FPGA engineer/ASIC frontend engineer
Score
100%Experience:
0 y Score
100%Experience:
0 y Location:
710000 Xi'an Last update:
22.04.2021 Availability
Available
Rate
Onsite hourly: N/A
Remote hourly: N/A
Languages
Chinese: Native
English: Advanced
Description
I am a Goal-Oriented Senior Digital ASIC/FPGA Engineer with over ten years of experience. Several work experience enable me to pick up and own new concepts to contribute with innovative work. I have a Bachlor Degree in electronic since 2006.After worked in several big company, i have the qualification of engineering and engineering management experience in development or use of FPGA products, IP to complete a project.
Here is a list of my high level programming skills:
Verilog -- Reliable and efficient code for simulation and synthesis, mainly for Xilinx and Altera FPGAs. Also with experience in writing Verilog for ASIC. High awareness of device targetting in source code. Careful and secure clock domain crossings.
Perl/tcl/Make -- familiarity with the language,can write simple script to enhance the work efficiency
Circuit Board -- work closely with Hardware Design Engineer to discuss the system design.
Here is a list of my high level programming skills:
Verilog -- Reliable and efficient code for simulation and synthesis, mainly for Xilinx and Altera FPGAs. Also with experience in writing Verilog for ASIC. High awareness of device targetting in source code. Careful and secure clock domain crossings.
Perl/tcl/Make -- familiarity with the language,can write simple script to enhance the work efficiency
Circuit Board -- work closely with Hardware Design Engineer to discuss the system design.
Other skills
Description
I am a Goal-Oriented Senior Digital ASIC/FPGA Engineer with over ten years of experience. Several work experience enable me to pick up and own new concepts to contribute with innovative work. I have a Bachlor Degree in electronic since 2006.After worked in several big company, i have the qualification of engineering and engineering management experience in development or use of FPGA products, IP to complete a project.
Here is a list of my high level programming skills:
Verilog -- Reliable and efficient code for simulation and synthesis, mainly for Xilinx and Altera FPGAs. Also with experience in writing Verilog for ASIC. High awareness of device targetting in source code. Careful and secure clock domain crossings.
Perl/tcl/Make -- familiarity with the language,can write simple script to enhance the work efficiency
Circuit Board -- work closely with Hardware Design Engineer to discuss the system design.
Here is a list of my high level programming skills:
Verilog -- Reliable and efficient code for simulation and synthesis, mainly for Xilinx and Altera FPGAs. Also with experience in writing Verilog for ASIC. High awareness of device targetting in source code. Careful and secure clock domain crossings.
Perl/tcl/Make -- familiarity with the language,can write simple script to enhance the work efficiency
Circuit Board -- work closely with Hardware Design Engineer to discuss the system design.